APA (7th ed.) Citation

Farhana, S., Alam, A. H. M. Z., & Khan, S. (2012). Design of a multiple valued logic analog to digital converter using 0.13μm CMOS process. Academic Information Press.

Chicago Style (17th ed.) Citation

Farhana, Soheli, A. H. M. Zahirul Alam, and Sheroz Khan. Design of a Multiple Valued Logic Analog to Digital Converter Using 0.13μm CMOS Process. Academic Information Press, 2012.

MLA (8th ed.) Citation

Farhana, Soheli, et al. Design of a Multiple Valued Logic Analog to Digital Converter Using 0.13μm CMOS Process. Academic Information Press, 2012.