Design of 0.13um CMOS multi-valued analog to digital converter

A multi-valued logic outputs for analog to digital (ADC) have been implemented in this paper. The use of multiple-valued logic outputs for ADC design offers the possibility of an overall reduction in circuit complexity and size. The ADC generates multi-valued logic outputs rather than the convention...

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Main Authors:	Farhana, Soheli, Alam, A. H. M. Zahirul, Khan, Sheroz, Rahman, Md. Ataur
Format:	Conference or Workshop Item
Language:	English
Published:	2012
Subjects:	TK Electrical engineering. Electronics Nuclear engineering
Online Access:	http://irep.iium.edu.my/26288/ http://irep.iium.edu.my/26288/ http://irep.iium.edu.my/26288/ http://irep.iium.edu.my/26288/1/06271248.pdf

id	iium-26288
recordtype	eprints
spelling	iium-262882017-06-14T02:18:32Z http://irep.iium.edu.my/26288/ Design of 0.13um CMOS multi-valued analog to digital converter Farhana, Soheli Alam, A. H. M. Zahirul Khan, Sheroz Rahman, Md. Ataur TK Electrical engineering. Electronics Nuclear engineering A multi-valued logic outputs for analog to digital (ADC) have been implemented in this paper. The use of multiple-valued logic outputs for ADC design offers the possibility of an overall reduction in circuit complexity and size. The ADC generates multi-valued logic outputs rather than the conventional binary output system. The design implements current mode ADC architecture and is simulated using the model parameters for a standard 0.13μm CMOS process. The performance analysis of the design shows desirable performance parameters in terms of response, low power consumption, and a sampling rate of 500kHz at a supply voltage of 1.3V was achieved. The ADC design is suitable for digital wireless communication applications such as ultra wideband (UWB) and the needs of mixed-signal integrated circuit design and can be implemented as a conversion circuit for systems based on multiple-valued logic design. 2012 Conference or Workshop Item PeerReviewed application/pdf en http://irep.iium.edu.my/26288/1/06271248.pdf Farhana, Soheli and Alam, A. H. M. Zahirul and Khan, Sheroz and Rahman, Md. Ataur (2012) Design of 0.13um CMOS multi-valued analog to digital converter. In: International Conference on Computer and Communication Engineering (ICCCE 2012), 3-5 July 2012, Seri Pacific Hotel Kuala Lumpur. http://dx.doi.org/10.1109/ICCCE.2012.6271248 doi:10.1109/ICCCE.2012.6271248
repository_type	Digital Repository
institution_category	Local University
institution	International Islamic University Malaysia
building	IIUM Repository
collection	Online Access
language	English
topic	TK Electrical engineering. Electronics Nuclear engineering
spellingShingle	TK Electrical engineering. Electronics Nuclear engineering Farhana, Soheli Alam, A. H. M. Zahirul Khan, Sheroz Rahman, Md. Ataur Design of 0.13um CMOS multi-valued analog to digital converter
description	A multi-valued logic outputs for analog to digital (ADC) have been implemented in this paper. The use of multiple-valued logic outputs for ADC design offers the possibility of an overall reduction in circuit complexity and size. The ADC generates multi-valued logic outputs rather than the conventional binary output system. The design implements current mode ADC architecture and is simulated using the model parameters for a standard 0.13μm CMOS process. The performance analysis of the design shows desirable performance parameters in terms of response, low power consumption, and a sampling rate of 500kHz at a supply voltage of 1.3V was achieved. The ADC design is suitable for digital wireless communication applications such as ultra wideband (UWB) and the needs of mixed-signal integrated circuit design and can be implemented as a conversion circuit for systems based on multiple-valued logic design.
format	Conference or Workshop Item
author	Farhana, Soheli Alam, A. H. M. Zahirul Khan, Sheroz Rahman, Md. Ataur
author_facet	Farhana, Soheli Alam, A. H. M. Zahirul Khan, Sheroz Rahman, Md. Ataur
author_sort	Farhana, Soheli
title	Design of 0.13um CMOS multi-valued analog to digital converter
title_short	Design of 0.13um CMOS multi-valued analog to digital converter
title_full	Design of 0.13um CMOS multi-valued analog to digital converter
title_fullStr	Design of 0.13um CMOS multi-valued analog to digital converter
title_full_unstemmed	Design of 0.13um CMOS multi-valued analog to digital converter
title_sort	design of 0.13um cmos multi-valued analog to digital converter
publishDate	2012
url	http://irep.iium.edu.my/26288/ http://irep.iium.edu.my/26288/ http://irep.iium.edu.my/26288/ http://irep.iium.edu.my/26288/1/06271248.pdf
first_indexed	2023-09-18T20:39:11Z
last_indexed	2023-09-18T20:39:11Z
_version_	1777409250144813056

Design of 0.13um CMOS multi-valued analog to digital converter

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