FPGA implementation of RSA encryption engine with flexible key size

An approach to develop the FPGA of a flexible key RSA encryption engine that can be used as a standard device in the secured communication system is presented. The VHDL modeling of this RSA encryption engine has the unique characteristics of supporting multiple key sizes, thus can easily be...

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Main Authors:	Ibrahimy, Muhammad Ibn, Reaz, Mamun Bin Ibne, Asaduzzaman, Khandaker, Chowdhury, Md. Sazzad Hossien
Format:	Article
Language:	English
Published:	2007
Subjects:	T Technology (General)
Online Access:	http://irep.iium.edu.my/29540/ http://irep.iium.edu.my/29540/ http://irep.iium.edu.my/29540/1/FPGA_Implementation_of_RSA_Encryption.pdf

id	iium-29540
recordtype	eprints
spelling	iium-295402013-03-28T03:02:54Z http://irep.iium.edu.my/29540/ FPGA implementation of RSA encryption engine with flexible key size Ibrahimy, Muhammad Ibn Reaz, Mamun Bin Ibne Asaduzzaman, Khandaker Chowdhury, Md. Sazzad Hossien T Technology (General) An approach to develop the FPGA of a flexible key RSA encryption engine that can be used as a standard device in the secured communication system is presented. The VHDL modeling of this RSA encryption engine has the unique characteristics of supporting multiple key sizes, thus can easily be fit into the systems that require different levels of security. A simple nested loop addition and subtraction have been used in order to implement the RSA operation. This has made the processing time faster and used comparatively smaller amount of space in the FPGA. The hardware design is targeted on Altera STRATIX II device and determined that the flexible key RSA encryption engine can be best suited in the device named EP2S30F484C3. The RSA encryption implementation has made use of 13,779 units of logic elements and achieved a clock frequency of 17.77MHz. It has been verified that this RSA encryption engine can perform 32-bit, 256-bit and 1024-bit encryption operation in less than 41.585us, 531.515us and 790.61us respectively. 2007 Article PeerReviewed application/pdf en http://irep.iium.edu.my/29540/1/FPGA_Implementation_of_RSA_Encryption.pdf Ibrahimy, Muhammad Ibn and Reaz, Mamun Bin Ibne and Asaduzzaman, Khandaker and Chowdhury, Md. Sazzad Hossien (2007) FPGA implementation of RSA encryption engine with flexible key size. International Journal of Communications, 1 (3). pp. 107-113. http://www.naun.org/multimedia/NAUN/communications/c-18.pdf
repository_type	Digital Repository
institution_category	Local University
institution	International Islamic University Malaysia
building	IIUM Repository
collection	Online Access
language	English
topic	T Technology (General)
spellingShingle	T Technology (General) Ibrahimy, Muhammad Ibn Reaz, Mamun Bin Ibne Asaduzzaman, Khandaker Chowdhury, Md. Sazzad Hossien FPGA implementation of RSA encryption engine with flexible key size
description	An approach to develop the FPGA of a flexible key RSA encryption engine that can be used as a standard device in the secured communication system is presented. The VHDL modeling of this RSA encryption engine has the unique characteristics of supporting multiple key sizes, thus can easily be fit into the systems that require different levels of security. A simple nested loop addition and subtraction have been used in order to implement the RSA operation. This has made the processing time faster and used comparatively smaller amount of space in the FPGA. The hardware design is targeted on Altera STRATIX II device and determined that the flexible key RSA encryption engine can be best suited in the device named EP2S30F484C3. The RSA encryption implementation has made use of 13,779 units of logic elements and achieved a clock frequency of 17.77MHz. It has been verified that this RSA encryption engine can perform 32-bit, 256-bit and 1024-bit encryption operation in less than 41.585us, 531.515us and 790.61us respectively.
format	Article
author	Ibrahimy, Muhammad Ibn Reaz, Mamun Bin Ibne Asaduzzaman, Khandaker Chowdhury, Md. Sazzad Hossien
author_facet	Ibrahimy, Muhammad Ibn Reaz, Mamun Bin Ibne Asaduzzaman, Khandaker Chowdhury, Md. Sazzad Hossien
author_sort	Ibrahimy, Muhammad Ibn
title	FPGA implementation of RSA encryption engine with flexible key size
title_short	FPGA implementation of RSA encryption engine with flexible key size
title_full	FPGA implementation of RSA encryption engine with flexible key size
title_fullStr	FPGA implementation of RSA encryption engine with flexible key size
title_full_unstemmed	FPGA implementation of RSA encryption engine with flexible key size
title_sort	fpga implementation of rsa encryption engine with flexible key size
publishDate	2007
url	http://irep.iium.edu.my/29540/ http://irep.iium.edu.my/29540/ http://irep.iium.edu.my/29540/1/FPGA_Implementation_of_RSA_Encryption.pdf
first_indexed	2023-09-18T20:43:23Z
last_indexed	2023-09-18T20:43:23Z
_version_	1777409513928785920

FPGA implementation of RSA encryption engine with flexible key size

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