The performance evaluation of 3D torus using link-sharing method in NoC router
In spite of much advancement in network-on-chip (NoC), area overhead further need to be explored and improved. Thus, a high performance router using minimum hardware circuits will not only reduce cost but also minimize the layout area. In this paper, we have proposed a memory sharing method, where a...
| Main Authors: | , , , |
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| Format: | Conference or Workshop Item |
| Language: | English English |
| Published: |
IEEE
2016
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| Subjects: | |
| Online Access: | http://irep.iium.edu.my/50915/ http://irep.iium.edu.my/50915/ http://irep.iium.edu.my/50915/1/50915_The_Performance_Evaluation_of_3D_Torus.pdf http://irep.iium.edu.my/50915/4/50915_The%20performance%20evaluation_scopus.pdf |