Encryption using FPGA

Advanced Encryption Standard (AES), a Federal Information Processing Standard (FIPS), is an approved cryptographic algorithm that can be used to protect electronic data. The AES algorithm is a block cipher that can encrypt and decrypt digital information. The AES algorithm is capable of using crypto...

Full description

Bibliographic Details
Main Author: Nor Robaini, Ibrahim
Format: Undergraduates Project Papers
Language:English
Published: 2008
Subjects:
Online Access:http://umpir.ump.edu.my/id/eprint/421/
http://umpir.ump.edu.my/id/eprint/421/1/Nor_Robaini_Binti_Ibrahim_3184.pdf
id ump-421
recordtype eprints
spelling ump-4212015-03-03T06:03:16Z http://umpir.ump.edu.my/id/eprint/421/ Encryption using FPGA Nor Robaini, Ibrahim QA76 Computer software Advanced Encryption Standard (AES), a Federal Information Processing Standard (FIPS), is an approved cryptographic algorithm that can be used to protect electronic data. The AES algorithm is a block cipher that can encrypt and decrypt digital information. The AES algorithm is capable of using cryptographic keys of 128, 192, and 256 bits, this project implements the 128 bit standard on a Field Programming Gate Array (FPGA) using the VHDL, a hardware description language. 2008-05 Undergraduates Project Papers NonPeerReviewed application/pdf en http://umpir.ump.edu.my/id/eprint/421/1/Nor_Robaini_Binti_Ibrahim_3184.pdf Nor Robaini, Ibrahim (2008) Encryption using FPGA. Faculty of Electrical & Electronics Engineering, Universiti Malaysia Pahang .
repository_type Digital Repository
institution_category Local University
institution Universiti Malaysia Pahang
building UMP Institutional Repository
collection Online Access
language English
topic QA76 Computer software
spellingShingle QA76 Computer software
Nor Robaini, Ibrahim
Encryption using FPGA
description Advanced Encryption Standard (AES), a Federal Information Processing Standard (FIPS), is an approved cryptographic algorithm that can be used to protect electronic data. The AES algorithm is a block cipher that can encrypt and decrypt digital information. The AES algorithm is capable of using cryptographic keys of 128, 192, and 256 bits, this project implements the 128 bit standard on a Field Programming Gate Array (FPGA) using the VHDL, a hardware description language.
format Undergraduates Project Papers
author Nor Robaini, Ibrahim
author_facet Nor Robaini, Ibrahim
author_sort Nor Robaini, Ibrahim
title Encryption using FPGA
title_short Encryption using FPGA
title_full Encryption using FPGA
title_fullStr Encryption using FPGA
title_full_unstemmed Encryption using FPGA
title_sort encryption using fpga
publishDate 2008
url http://umpir.ump.edu.my/id/eprint/421/
http://umpir.ump.edu.my/id/eprint/421/1/Nor_Robaini_Binti_Ibrahim_3184.pdf
first_indexed 2023-09-18T21:52:36Z
last_indexed 2023-09-18T21:52:36Z
_version_ 1777413869470220288