Development of an economical lapping process
The manufacturing of silicon wafers in particular involves numerous processes such as grinding, lapping, and polishing of large diameter wafers employing expensive equipment in order to produce the required optical quality and damage-free surfaces. In the finishing of thin silicon chips for making I...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
Trans Tech Publications, Switzerland
2012
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| Subjects: | |
| Online Access: | http://irep.iium.edu.my/28463/ http://irep.iium.edu.my/28463/ http://irep.iium.edu.my/28463/2/DEVELOPMENT_OF_AN_ECONOMICAL_LAPPING_PROCESS.pdf |
| Summary: | The manufacturing of silicon wafers in particular involves numerous processes such as grinding, lapping, and polishing of large diameter wafers employing expensive equipment in order to produce the required optical quality and damage-free surfaces. In the finishing of thin silicon chips for making IC chips especially, it is difficult to lap and polish the substrate and obtain low surface integrity, surface finish and at the same time generate flat planar surfaces. This paper presents the development of a low cost lapping process, the process tried out on thin silicon chips
that generated fracture-free with mirror-like surfaces of low roughness values and reasonably high degree of flatness. |
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