The performance evaluation of a 3D torus network using partial link-sharing method in NoC router buffer
The high performance network-on-chip (NoC) router using minimal hardware resources to minimize the layout area is very essential for NoC design. In this paper, we have proposed a memory sharing method of a wormhole routed NoC architecture to alleviate the area overhead of a NoC router. In the propos...
| Main Authors: | , , , |
|---|---|
| Format: | Article |
| Language: | English English |
| Published: |
Institute of Electronics, Information and Communication, Engineers, IEICE
2017
|
| Subjects: | |
| Online Access: | http://irep.iium.edu.my/63092/ http://irep.iium.edu.my/63092/ http://irep.iium.edu.my/63092/ http://irep.iium.edu.my/63092/1/63092_The%20performance%20evaluation%20of%20a%203D%20torus%20network_article.pdf http://irep.iium.edu.my/63092/2/63092_The%20performance%20evaluation%20of%20a%203D%20torus%20network_scopus.pdf |
Internet
http://irep.iium.edu.my/63092/http://irep.iium.edu.my/63092/
http://irep.iium.edu.my/63092/
http://irep.iium.edu.my/63092/1/63092_The%20performance%20evaluation%20of%20a%203D%20torus%20network_article.pdf
http://irep.iium.edu.my/63092/2/63092_The%20performance%20evaluation%20of%20a%203D%20torus%20network_scopus.pdf